Fetch
Use the program counter to identify the next instruction and move its encoded form from memory into the processor.
Computer hardware implements computation as physical state change. Digital logic stores and transforms bits, processor organization gives instructions operational meaning, and memory systems move data across layers with different capacity and access costs.
Logic gates do not “understand” instructions, and software does not need to track individual transistors. Architecture connects those scales through representations and interfaces.
Use the program counter to identify the next instruction and move its encoded form from memory into the processor.
Interpret the instruction bits as an operation, operands, addressing mode, or control action defined by the instruction set.
Arithmetic logic, control circuitry, registers, and data paths perform the state changes required by the instruction.
Write results to registers or memory and update control state so execution can continue with the next instruction.
This simulator is a deliberately tiny accumulator machine. Real processors add wider registers, richer instruction sets, caches, pipelines, prediction, parallel execution, privilege levels, and many other structures.
Exact technology and performance change across machines and generations. The durable idea is a hierarchy balancing access cost, capacity, persistence, and locality.
Values immediately available to the current processor core.
Recently or predictably used data kept near execution to exploit locality.
The active working set of programs and data outside the processor caches.
Long-lived data retained when power is removed, traded against much higher access cost.
Voltages and physical states are interpreted as bits; groups of bits encode numbers, instructions, addresses, characters, and other data.
Software can use an instruction-set contract without knowing transistor layout, while hardware can implement the same contract in many microarchitectures.
Programs tend to reuse nearby data and instructions. Memory hierarchies exploit that pattern to hide slower storage behind faster smaller levels.
Hardware can overlap or duplicate work through pipelining, multiple execution units, vector operations, multiple cores, and accelerators.